Spain Semiconductor Industry Convenes to Forge Domestic Alliances

MADRID, Spain â Spain’s semiconductor industry is working to strengthen collaboration across companies, universities, and research centers as it seeks to build a more connected national ecosystem. That effort was reflected in the first MatchMaking Day, organized by MicroNanoSpain, Spain’s national microelectronics and nanoelectronics platform, and the Spanish Semiconductor Industry Association (AESEMI), on June 30 at the Escuela de Organización Industrial in Madrid. As European policymakers seek to strengthen semiconductor supply chain resilience, the meeting focused on aligning Spainâs infrastructure and talent with broader European initiatives. Opening the event, Diego Crescente, director general of the EOI, and Carlos Pardo, president of AESEMI, said the event was intended to help participants build partnerships and develop collaborative projects. Sharing resources and infrastructure A key topic was how public and private funding can help lower the financial risks of hardware development. In this discussion, Lara RodrÃguez Ruibal from the Fundación para el Conocimiento madri+d introduced the European Digital Innovation Hub Madrid Region 2.0 framework. This program uses a “Test Before Invest” approach, letting companies try out high-performance computing, AI, and robotics tools before investing in full-scale projects. Alejandra Marina Botella Madrid also described the testing facilities at Universidad Carlos III de Madrid. She explained how the university offers rapid prototyping and technical assessments to organizations in the European Digital Innovation Hub network. Early evaluations help hardware developers spot technology gaps and reduce financial risks before production. Afterward, the hub helps them prepare proposals to secure EU funding or private investment. The event also covered supply chain localization, especially in raw material processing. In that context, Iñaki Bastida Siaz and Francisco Javier Peña from Derivados del Flúor presented the WETCHEM project, which is supported by national and European initiatives and aims to produce ultra-pure wet chemicals in Spain. These chemicals, such as hydrofluoric acid, ammonium fluoride, and sulfuric acid, are essential for etching and cleaning in semiconductor manufacturing. Even tiny amounts of metal contamination can lower the yield of advanced sub-2-nm chips. Building an independent European RISC-V ecosystem The event then showcased Europeâs work to create its own RISC-V ecosystem. Negin Mahani, a senior researcher at the Barcelona Supercomputing Center (BSC) and technical coordinator for the DARE project, gave an update on the projectâs main goals. DARE has a â¬240 million budget, funded by member states and the European High-Performance Computing Joint Undertaking (EuroHPC JU). The projectâs goal is to build a full hardware-and-software ecosystem based on the open RISC-V standard, supporting Europeâs plans for future supercomputing. Mahani said the first phase of the project, now in its second year, will last three years and involves 38 partners in 29 work packages. By bringing together experts from industry, academia, and research, the group aims to boost Europeâs independence in processor development. The project is developing three specialized chiplets: a general-purpose processor (GPP), an AI processing unit (AIPU) for inference, and a vector processor (VEC). These will support many high-performance computing and AI tasks. Mahani added that the DARE team is building hardware and software together to get the best performance and efficiency. The goal is to use these technologies in future European exascale supercomputers and create a strong, independent HPC ecosystem. Standardizing analog design methods Digital chip design relies heavily on automation, but analog design remains largely manual and tied to specific foundries and tools. To address this issue, LluÃs Terés, a researcher at the Spanish National Research Council (CSIC) and head of the ICAS group, presented the agnostIP method. Terés explained that agnostIP is a flexible design framework for analog and mixed-signal intellectual property. It uses a frontend layer to separate reusable design ideas from details tied to specific tools or technologies. The backend then uses this information to automatically create designs for different commercial or open-source design tools. By letting designers keep process details local and use open-source IP libraries, agnostIP aims to make analog parts reusable across various manufacturing methods. Terés said this approach should help the industry rely less on specific tools and make it easier to share analog intellectual property without needing non-disclosure agreements. Daniel Fernández from the Universitat Politècnica de Catalunya then talked about the economic benefits of automating analog design. He introduced the CMOS Analog Synthesizer Tool, which automates transistor sizing for analog circuits. He noted that manual design often leads to long cycles and high engineering costs. The tool checks all design constraints simultaneously to create compliant netlists, thereby shortening development time and facilitating technology migration. Fernández said the project is looking for a CEO with deep-tech experience to lead fundraising and business licensing. Specialized processing and neuromorphic uses Later sessions focused on new developments in edge computing and sensing hardware. Xabier Iturbe, a senior research engineer at Ikerlan, showed the BEGI prototype, a four-dimensional perception system created for the NimbleAI Horizon Europe project. This FPGA prototype processes space and time data for 3D flow analysis. It runs at high speeds to support low-latency vision systems. Alejandro GarcÃa Gener from Integra Group discussed his companyâs work on neuromorphic learning and spiking neural networks. Unlike traditional AI, these networks use sparse, event-driven computing. GarcÃa Gener explained that this setup processes information only when events occur, which saves energy. The technology is aimed at industries that need real-time decision-making on embedded devices. Possible uses include constant monitoring for chemical, biological, radiological, and nuclear threats, detecting hardware security issues, and processing biomedical signals for health wearables. The meeting ended with a review of ongoing projects. Miguel Ãngel Cabrera Gallego, project manager for SemiConecta, gave an update on the collaborative network. Overall, the event showed the industryâs commitment to connecting academic research with industrial production to meet the changing needs of the global semiconductor market. âSee also: Spainâs Semiconductor Landscape: Six Stories from a Growing Ecosystem How BSC Contributes to Europeâs Hybrid Quantum Strategy How Spain Built a Quantum Ecosystem Without Calling It One Semidynamics Becomes 3-nm Ready, Moves Europe Toward Hardware Sovereignty Leave a Reply You must Register or Login to post a comment.