Research Bits: Sept. 8

Carbon insulator for interconnects; high-temperature SiC JFETs; VCT dielectric. Researchers from the National University of Singapore developed an atom-thin film of amorphous carbon designed to insulate increasingly thin copper interconnect wires. The film maintained a dielectric constant of 1.35 across thicknesses from 0.8nm to 2.7nm, withstanding strong electric fields while preventing copper ions from passing through it. “Carbon can conduct electricity in many forms, so at first it may seem an unlikely choice for an insulator,” said Toh Chee Tat of the Department of Materials Science and Engineering at NUS CDE and the NUS Centre for Advanced 2D Materials, in a press release. “In our film, the atoms are arranged randomly. This disorder restricts how freely the electrons can respond to an electric field, allowing the k-value to remain low even when the film is extremely thin.” The film was produced using chemical vapor deposition at temperatures below 300° C directly on silicon dioxide, copper, and cobalt, with uniform growth across a four-inch wafer and around the sidewalls and corners of patterned structures. In addition to the low k-value, the 0.8nm film prevented copper from passing through it and withstood fields of 28-31 megavolts per centimeter before losing its ability to insulate. “The film gives us low-k insulation and a copper barrier in the same layer,” added Artem Grebenko, senior research fellow in the Department of Physics at NUS and a researcher at CA2DM, in a statement. “At dimensions this small, every fraction of a nanometer matters and combining these functions could free more space for the copper line itself.” The team plans to collaborate with TSMC on testing long-term reliability, scalability, and compatibility with existing processes. [1] Researchers from Kyoto University developed silicon carbide (SiC) complementary junction FETs (JFETs) that can operate at 600°C. “We believe the lack of development is because the research community has been trying to apply silicon-era thinking to a fundamentally different material,” said Mitsuaki Kaneko, an associate professor at Kyoto University, in a statement. “Our goal is to open a new path forward with complementary JFETs designed to harness the intrinsic properties of SiC itself.” The JFET structure has a bottom-gate design to improve the threshold voltage controllability. It also uses well-based isolation instead of a semi-insulating substrate to suppress the high-temperature leakage current. The combination reduced the leakage current to close to the theoretical limit for SiC. Next, the team plans to create more complex circuits, scaling up to wafer-level production, and ensuring the entire package remains robust in extreme environments. [2] Researchers from Korea Advanced Institute of Science and Technology (KAIST) and Ulsan National Institute of Science and Technology (UNIST) developed a multilayer interlayer dielectric structure that reduces defects and significantly enhances the performance of oxide vertical channel transistors (VCTs), which show potential for compute-in-memory devices. The silicon nitride/silicon dioxide/silicon nitride (SiN/SiO₂/SiN) dielectric acts as an oxygen tunnel that enables stable compensation of oxygen vacancies in the oxide semiconductor while simultaneously suppressing unwanted oxidation at the electrode, improving current density and data retention time. After more than ten million cycles of electrical stress testing, the threshold voltage shift remained below 50 millivolts. The team was also able to integrate the oxide semiconductor with conventional silicon CMOS technology. “This research is significant because it goes beyond improving memory density and addresses the long-standing instability problem in 3D devices through a new approach based on oxygen migration control,” said Hyeonho Gu, a researcher at KAIST, in a statement. “We expect this technology to play a key role in accelerating the commercialization of ultra-low-power, high-performance compute-in-memory systems required for the AI era.” [3] [1] CT. Toh, A.K. Grebenko, U. Karadeniz, et al. Atomically thin amorphous carbon with an ultralow dielectric constant. Nat Electron (2026). https://doi.org/10.1038/s41928-026-01685-2 [2] M. Kaneko, S. Shibata, T. Kimoto. Over 600 °C operation of ion-implantation-based SiC bottom-gate JFETs. APL Electronic Devices 1 September 2026; 2 (3): 036113. https://doi.org/10.1063/5.0346734 [3] H. Gu, H. Jung, Y. Lee, et al. Oxygen-Tunnel Indium Tin Oxide Vertical Channel Transistors with Enhanced Current Density and Reliability for Monolithic 3D Compute-In-Memory Systems. Advanced Functional Materials 36, no. 66 (2026): e31989. https://doi.org/10.1002/adfm.202531989 Leave a Reply